Electronic Design

Find the Fastest Route to Portable Stimulus Tests with SystemVerilog

Download this article in PDF format. The Portable Stimulus Specification (PSS) is all about reusing commonly used test atoms to create new scenarios more quickly. It saves us from wasting precious ...
Design-Reuse

Transactions in an OVM SystemVerilog Verification Environment

Modeling a verification environment with transactions encompasses many areas, including test bench design and debug, golden model comparison, functional verification between abstraction levels and ...
EDN

System Verilog configurable coverage model in an OVM setup – concept of reusability

With the advent of a new era in verification technology based on an advanced HVL like System Verilog, the concept of random stimulus based verification was born, to verify today’s multi‐million gate ...
Semiconductor Engineering

Updated UVM Cookbook Supports IEEE 1800.2 Standard And Emulation

I’m happy to announce that we at Mentor have just released a fully-updated version of our popular UVM Cookbook, which is available online here. Cookbook Overview Diagram The Universal Verification ...
Electronic Design

Open Verification Methodology Relieves Inefficiencies

Since the IEEE’s adoption of SystemVerilog as IEEE Standard 1800-2005, and EDA vendors’ subsequent release of products supporting that standard, the semiconductor verification teams my company serves ...
Design-Reuse

OCP 2.2 MVC Accelerates Verification Productivity

In April 2009, Mentor Graphics released the 2009.1 version of its Multiview Verification Component (MVC) library which featured an upgrade to its OCP-IP MVC to make it OCP-IP 2.2 compliant. The OCP ...
Semiconductor Engineering

Making Declarative Modeling Modular: Portable Stimulus Introduces Dynamic Constraints

Naturally, Accellera’s Portable Stimulus Standard (PSS) supports the powerful capabilities of advanced verification techniques that are well-known in the industry today, including object-oriented ...